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[VHDL-FPGA-Verilog] SPITX16

Description: 基于状态机的优秀SPI输出程序（以DAC7512为基础，可修改）-VHDL code about SPI
Platform: | Size: 1024 | Author: 颜德飞 | Hits:

[VHDL-FPGA-Verilog] simple_spi_latest.tar

Description: 基于vhdl的spi主从模式的程序，实现简单的SPI收发，对于实际使用学习是个比较好的例子！-VHDL SPI master-slave mode based on the procedures, the realization of a simple SPI transceiver for practical use, is a good example of learning!
Platform: | Size: 575488 | Author: 焦龙超 | Hits:

[VHDL-FPGA-Verilog] ad_spi

Description: AD2548 SPI读写时序 VHDL-AD2548 SPI
Platform: | Size: 2048 | Author: wei | Hits:

[Other] vspi

Description: SPI串口的内核实现verilog语言和VHDL语言-The serial peripheral interface spi bus
Platform: | Size: 6144 | Author: david | Hits:

[VHDL-FPGA-Verilog] DAC_VHDL

Description: DAC VHDL code using SPI method
Platform: | Size: 7168 | Author: mohamed | Hits:

[VHDL-FPGA-Verilog] spi_verilog_master_slave_latest.tar

Description: 该项目从需要具有强大而简单的以VHDL编写的SPI接口核心开始，用于通用的FPGA到设备接口。 所产生的内核产生小而高效的电路，从非常慢的SPI时钟到超过50MHz的SPI时钟。-This project started the need to have robust yet simple SPI interface cores written in VHDL to use in generic FPGA-to-device interfacing. The resulting cores generate small and efficient circuits, that operate very slow SPI clocks up to over 50MHz SPI clocks.
Platform: | Size: 3072 | Author: asdtgg | Hits:

[VHDL-FPGA-Verilog] spi_master_module

Description: Simple VHDL SPI-module core source code (only spi-master)
Platform: | Size: 1024 | Author: Alex | Hits:
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